The present invention relates to an operational amplifier widely used in general-purpose analog circuits and, more particularly, to an operational amplifier using a CMOS circuit. The operational amplifier of the present invention can be suitably used in applications that demand a large drive current, such as an output buffer of a loudspeaker.
An operational amplifier related to the present invention has the arrangement shown in FIG. 1. This operational amplifier comprises a differential stage which receives two input signals IN- and IN+ and outputs a signal corresponding to the difference between the two input signals from a node N1, and an output stage which outputs a signal OUT corresponding to the difference between the two input signals IN- and IN+ based on the output signal from the node N1.
The differential stage has p-channel MOS transistors TP101 and TP102, and n-channel MOS transistors TN101, TN102, and TN103. The sources of the transistors TP101 and TP102 are connected to a power supply voltage terminal V.sub.DD, and their gates are connected to the drain of the transistor TP101.
The drain of the transistor TN101 is connected to the drain of the transistor TP101, and the drain of the transistor TN102 to the drain of the transistor TP102. The gate of the transistor TN101 receives the input signal IN-, and the gate of the transistor TN102 receives the input signal IN+. The sources of the transistors TN101 and TN102 are commonly connected to the drain of the transistor TN103, and the source of the transistor TN103 is grounded. The gate of the transistor TN103 receives a predetermined bias voltage VBIAS and is normally ON together with the gate of the transistor TN104 on the output stage.
The output stage has a p-channel MOS transistor TP103 and an n-channel MOS transistor TN104. The transistor TP103 has a source connected to the power supply voltage terminal V.sub.DD, a gate connected to the node N1, and a drain connected to an output terminal OUT. The transistor TN104 has a drain connected to the output terminal OUT, a grounded source, and a gate that receives the predetermined voltage VBIAS to normally keep the transistor TN104 ON.
In the operational amplifier having this arrangement, the output current extracted from the output terminal is limited. This is because the gate of the transistor TN104 receives the predetermined bias voltage VBIAS to normally keep the voltage between the gate and source constant, and even when a high-level output signal OUT is to be output, a current always flows through the transistor TN104.
To obtain a larger output current, the transistor TP103 on the output stage must be set to a large size.
To solve this problem, a push-pull operational amplifier is proposed, and its circuit arrangement is shown in FIG. 2. This push-pull operational amplifier has the same differential and output stages as in the operational amplifier shown in FIG. 1 except that a level shift stage having n-channel MOS transistors TN104 and TN105 is arranged between the differential and output stages.
The transistor TN104 has a source connected to a power supply voltage terminal V.sub.DD, a gate connected to a node N1 on the differential stage, and a source connected to the gate of a transistor TN104 via a node N2 together with the drain of the transistor TN105. The gate of the transistor TN105 receives a bias voltage VBIAS together with a transistor TN103, and the source of the transistor TN105 is grounded.
In this operational amplifier, the gate of the transistor TN104 on the output stage receives not the predetermined bias voltage VBIAS but a signal at the output node N2 on the level shift stage. The signal at the node N2 has a potential prepared by converting on the level shift stage the level of the potential of the output node N1 on the differential stage.
More specifically, when the output node N1 on the differential amplification stage falls to a ground voltage Vcc, the ON resistance of a transistor TP103 on the output stage decreases toward an ON state. In this case, the ON resistance of the transistor TN104 increases toward an OFF state, the level-converted potential of the output node N2 falls further toward a ground voltage Vss, and thus the transistor TN104 operates toward an OFF state. When, therefore, an output signal OUT rises toward the level of the power supply voltage Vss, the ON resistance of the transistor TN104 increases further to an OFF state to decrease the current flowing through the transistor TN104. As a result, a larger current can be extracted from the output terminal OUT.
In this operational amplifier, however, since the output node N2 on the level shift stage functions as a source follower, the potential of the node N2 is limited by the threshold of the transistor TN104. This also limits the current extracted from the output terminal OUT.
Further, the current flowing through the transistor TN104 on the output stage is difficult to estimate. Consequently, the punch-through current flowing through the transistors TP103 and TN104 cannot be controlled.
As described above, in the operational amplifiers shown in FIG. 1, a large output current cannot be obtained unless the size of the transistor on the output stage is increased, and in the operational amplifiers shown in FIG. 2, the punch-through current on the output stage cannot be controlled.